![]() ![]() This connection was first pointed out to me in discussions with Professor J.G. Fossum, “A Physical Short-Channel Model for the Thin-Film SOI MOSFET Applicable to Device and Circuit CAD,” IEEE Trans. ![]() Gibbons, “Fabrication and Analysis of Deep Submicron Strained-Si N-MOSFET’s,” IEEE Trans. Mizuno, “Nonstationary electron/hole transport in Sub-0.1mm MOS devices: Correlation with mobility and low power CMOS application,” IEEE Trans. Antoniadis, “Investigating the relationship between electron mobility and velocity in deeply scaled NMOS via mechanical stress,” IEEE Electron Dev. Mark Lundstrom, “On the Mobility Versus Drain Current Relation for a Nanoscale MOSFET,” IEEE Electron Dev. Price, “Monte Carlo calculation of electron transport in solids,” Semiconductors and Semimetals, 14, pp. Shockley, “Diffusion and drift of minority carrier in semiconductors for comparable capture and scattering mean free paths,” Phys. ![]() Brody, “Alternative approach to the solution of added carrier transport problems in semiconductors,” Phys. Rhoderick, Metal-Semiconductor Contacts, Clarendon Press, Oxford, UK, 1978. Lundstrom, Fundamentals of Carrier Transport, 2 nd Ed., Cambridge University Press, Cambridge, UK, 2000.Į.H. Lundstrom, “Elementary scattering theory of the MOSFET,” IEEE Electron Dev. Pierret, Advanced Semiconductor Fundamentals, Addision-Wesley, Reading, Massachusetts, 1987.Īnisur Rahman and Mark Lundstrom, “A Compact Model for the Nanoscale Double Gate MOSFET,” IEEE Trans. Govindan, “The role of scattering in nanotransistors,” IEEE Trans. Lundstrom, “A Simple Quantum Mechanical Treatment of Scattering in Nanoscale Transistors,” J. Mark Lundstrom and Zhibin Ren, “Essential Physics of Carrier Transport in Nanoscale MOSFETs,” IEEE Trans. Lundstrom, “Examination of design and manufacturing issues in a 10 nm Double Gate MOSFET using Nonequilibrium Green’s Function Simulation,” IEDM Tech. Fossum, “The ballistic nanotransistor: A simulation study,” IEDM Tech. Antoniadis, “On experimental determination of carrier velocity in deeply scaled NMOS: How close to the thermal limit?, IEEE Electron Dev. Bendix, “Performance limits of Si MOSFET’s,” IEDM Tech. National Academy of Engineering for “For leadership in microelectronics and nanoelectronics through research, innovative education, and unique applications of cyberinfrastructure” (2009).F. Lundstrom has received several recognitions for his career contributions to microelectronics including the Semiconductor Industry Association’s University Researcher Award (2005) and election to the U.S. The nanoHUB was also one of the very first to offer open-content educational resources, and it now serves a global community of more than two million annually. Lundstrom founded nanoHUB (), which for the past 25 years has offered online access to sophisticated electronic device simulation tools. Beginning in 1995, before the term `cloud computing’ entered the vocabulary. He is known best for his groundbreaking work on nanoscale transistors, which supported the design and manufacturing of transistors at the 10 nanometer length scale. Lundstrom began his career as an integrated circuit process development and manufacturing engineer and has been at Purdue since 1980 where his research and teaching have focused on electronic and thermal transport in semiconductor devices. to be ranked in the top 5 and the largest undergraduate program in the top 10. During 2020, he served as Acting Dean for Purdue’s college of Engineering, the largest graduate program in the U.S. He also currently sits on the Executive Committee of the American Semiconductor Academy. Mark Lundstrom is the Don and Carol Scifres Distinguished Professor of Electrical and Computer Engineering at Purdue University where he also serves as Principal Advisor on Microelectronics to the Executive Vice President for Strategic Initiatives.
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